Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[00:00:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
---------------Time Stamp[00:05:12]----------------
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:20:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:25:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:30:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:40:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:45:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:50:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[00:55:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:00:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
---------------Time Stamp[01:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:20:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:25:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:30:12]----------------
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BCBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:40:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
---------------Time Stamp[01:45:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:50:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BCBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[01:55:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:00:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[02:20:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[02:25:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[02:30:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:40:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:45:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:50:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[02:55:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:00:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:20:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
---------------Time Stamp[03:25:12]----------------
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:30:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:40:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:45:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:50:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[03:55:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:00:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:20:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:25:12]----------------
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:30:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[04:40:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[04:45:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[04:50:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[04:55:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
---------------Time Stamp[05:00:12]----------------
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:20:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:25:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:30:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:40:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:45:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:50:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BCBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[05:55:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:00:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BCBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:15:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BCBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:20:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:25:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:30:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:35:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:40:12]----------------
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:45:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:50:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[06:55:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:00:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:05:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:10:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[07:15:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tī---------------Time Stamp[07:20:12]----------------
nf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
---------------Time Stamp[07:25:12]----------------
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:30:12]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
---------------Time Stamp[07:35:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:40:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:45:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:50:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[07:55:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:00:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:05:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:10:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:15:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBCBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:20:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:25:13]----------------
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:30:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:35:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:40:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:45:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:50:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[08:55:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:00:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:05:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:10:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:15:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:20:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:25:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:30:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
---------------Time Stamp[09:35:13]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBB9m128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Serial Port Closed
monitor stop
---------------Time Stamp[09:40:13]----------------
---------------Time Stamp[09:45:13]----------------
Serial Port Opened
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Serial Port Closed
monitor stop
---------------Time Stamp[09:50:13]----------------
Serial Port Opened
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Upgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Waiting for client up Finished.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
---------------Time Stamp[10:04:33]----------------
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
TīUpgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Waiting for client up Finished.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Tīnf
d init
BBBBm128rd init over
bt
bl_main
Upgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Client is up.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
CCDD9B98h128Mrd init over
bt
bl_main
bl_signature_check
safe_bt_fl=0x00000000
don't do safe boot
second_bootloader=0x80100000


U-Boot 2012.04-hg49516ef49fed-dirty (Jan 26 2015 - 14:23:29)

Board: mips CPU: 4KWDRAM:  64 MiB
extra versions 0x40 0x1000000 0x41 0x2ad 
6001 DDR2 AUTO 396 6 20141225 h
flash_sonata_cs_spi_nor  0xBFF70018[0x5]  

 flash init the size
flash_init: size=0x1000000, sec cnt=4096, ID= 0x5e
Flash: 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
main_loop entered: bootdelay=0

check boot type
Hit any key to stop autoboot:  0  0
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > 
uboot > usb start 
(Re)start USB...
auto_detect_usb_port --- usb default sel port 0
port_sts0 c000000 port_sts1 c000000 
auto_detect_usb_port --- usb sel port 0
USB:   ehci_hcd_init 0...
Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
       scanning bus for storage devices... 0 Storage Device(s) found
       scanning bus for ethernet devices... 0 Ethernet Device(s) found
uboot > 
(Re)start USB...
auto_detect_usb_port --- usb default sel port 0
port_sts0 c001000 port_sts1 803 
auto_detect_usb_port --- usb sel port 1
USB:   ehci_hcd_init 1...
Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
       scanning bus for storage devices... 1 Storage Device(s) found
       scanning bus for ethernet devices... 0 Ethernet Device(s) found
uboot > 
(Re)start USB...
auto_detect_usb_port --- usb default sel port 1
port_sts0 c001000 port_sts1 8001205 
auto_detect_usb_port --- usb sel port 1
USB:   ehci_hcd_init 1...
Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
       scanning bus for storage devices... 1 Storage Device(s) found
       scanning bus for ethernet devices... 0 Ethernet Device(s) found
uboot > 
(Re)start USB...
auto_detect_usb_port --- usb default sel port 1
port_sts0 c001000 port_sts1 8001205 
auto_detect_usb_port --- usb sel port 1
USB:   ehci_hcd_init 1...
Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
       scanning bus for storage devices... 1 Storage Device(s) found
       scanning bus for ethernet devices... 0 Ethernet Device(s) found
uboot > fatload usb 0 80008000 flash_ddr2_43.bin
reading flash_ddr2_43.bin

4194304 bytes read
uboot > cp.b 80008000 b0000000 400000
Copy to Flash... erase start_from[0x10000000]to[0x10400000]  blk_cnt[0x40]
done
uboot > ---------------Time Stamp[10:09:33]----------------
Tīnf
d init
BBBBm128rd init over
bt
bl_main
#0FastLogo_TaskStart

 Built at Sep  4 2017--18:30:35 

 1. mem_start[8030ae00]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, EPG_BUFFER_ADDR is 3dc2000
free mem 6696448
**CDU UDQ**: 89de 47
Os version pass!
Enable irq!
mem_cfg
#######2111111111111##
#######21111144444444411##
#######33333333333##
#### standby time:hour=0,min=0,sec=0  ####
#### utc power off time:hour=0,min=0,sec=0  ####
#### loc_power off time:hour=12,min=30,sec=0  ####
#### loc_power on time:hour=0,min=0,sec=0  ####
#### time out:0,showlog=1#####
KKK[1143]

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30008c62]
charsto init done
uio init done
hdmi init done
drv_cfg.video_cfg.disp_cfg.b_osd_hscle 1
display init done
gpe init done
pdec init done
driver init done
KKK[1145]
^.^ at fastlogo init menu key:
FP menu key[6] = 4
menu key[0] = 95
menu key[1] = 12
menu key[2] = 69
menu key[3] = 24
menu key[4] = 92
menu key[5] = 67
menu key[6] = 84
menu key[7] = 24
^.^ at fastlogo init usr code:
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 750 ms
drv_init
check_key,line 1210
check_key,line 1222: means FP
FPhkey=4,line key=448check_key,line 1252: NULL key
g_p_logo_buf=90291e58,g_logo_size=92605
KKKK[1644]
goto ota
boot_para3=bfedc070,*boot_para3=12340001
FastLogo_TaskEnd,80100000
#0
MaincodeTaskStart

 Built at Sep  7 2017--09:43:28 

 1. mem_start[80829e10]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, GUI_RESOURCE_BUFFER_ADDR is f09000 heap_start[0x80829e10]
free mem 1326576
**CDU UDQ**: 89de 47
Os version pass!
sonata av main start!!! av start address 83ffb000 init code 80010000
av main end!!!stack address 0x83ffb000 size 241664
KKKK[5152]
 main st=83ffb000 bo=83fdd000, size=122880    
KKKK[5160]
mem_cfg
util_init

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30000422]
charsto init done
uio init done
thread task for ethernet 9 
	Chip ID = [SONATA]!
	Chip ID = [SONATA]!
@#$TS2022
nim init done
hdmi init done
----usb_mass_stor_attach usb0------
[block reset usb0]
[block reset usb1]
usb_host_alg_reg_set ver:8107
chip_usb_debug_sonata_A1 reg 0xbff700d4[1f8b6]0xbff700d8[1f8b6]0xbff700c4[fbea0a9]0xbff700c8[fbea0a9]



 g_usb_bus_msgq 0 ###usb module#### usb_bus_task prio[18] size[0x1000]
g_usb_bus * g_usb_bus = 8083D030 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8083d350
mt_ehci_init 631
----usb_mass_stor_attach usb1------
g_usb_bus * g_usb_bus = 80859EB0 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8085a1d0
mt_ehci_init 631
usb init done
standby init done
[psc]
ps_base_reg[bfe90084]:0x803
[portC]
PortStatus[2]
StartSend Mesq:0 Bus:80859eb0
SendMesDown 2
display init done
gpe init done
demux init done
audio init done
pdec init done
vdec init done
sonata_vbi_fifo_init: [a0884a7c][20000]
vbi inserter init done
ufs init done
After Modify AT Reg:[0xbff70018] == 30000422

After Modify AT Reg:[0xbff70018] 2222 == 30000422



Before Modify AT Reg:[0xBFF70090] == 00000D11
After Modify AT Reg:[0xBFF70090] == 00300D11

After Modify AT Reg:[0xbff70018] == 30000422

serial_open
driver init done
spi_sonata_io_ctrl LINE:[3356] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[4014] type[14] mask[407c] len[2]
set mid[5e] protect status[4014] type[14]Success
[register_rtsp_stream][ERROR][ERROR] --do nothing !!!!!!!!!!
[register_rtsp_stream] please config ENABLE_DEMUX_RTSP = Y!!!!!! !!
init_av_buf start
aud fw cfg buf[81218800][180000][400]
video fw cfg buf[a1708000][2202000][4000] size 2200000
init_av_buf end
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 1170 ms
drv_init
**LCK UDQ**: 2a05

----------------------------------------
 Software version is 1314000
----------------------------------------

mdl init time = 270 ms
mid_init
[usb_bus_start....]
RecvMesDown2
left_event 0 
close_fast_logo
<<ps_base_reg[bfe90084]:0x803
[portC]
>>[Start--Connect]
[Enumerate 0x803] 
[hub_add_new_dev 809e1af0]
[PortRstStart]
[p_dev80859df0   1]
[psc]
ps_base_reg[bfe90084]:0x8000205
PortStatus[0]
[Rst Down :8000205]
[HS]
usb_class_config
device ADD cost 161 ts 
[usb_bus_start....]

##usb_plug_in_callback!

 def  0; spdif 1 ; i2s  2.   now is 2 

 def  0; spdif 1 ; i2s  2.   now is 2 
Upgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Client is up.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
---------------Time Stamp[10:14:34]----------------
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
TRANSFER: SEQ ERROR, RETRY ... 
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
#0FastLogo_TaskStart

 Built at Sep  4 2017--18:30:35 

 1. mem_start[8030ae00]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, EPG_BUFFER_ADDR is 3dc2000
free mem 6696448
**CDU UDQ**: 89de 47
Os version pass!
Enable irq!
mem_cfg
#######2111111111111##
#######21111144444444411##
#######33333333333##
#### standby time:hour=0,min=0,sec=0  ####
#### utc power off time:hour=0,min=0,sec=0  ####
#### loc_power off time:hour=8,min=0,sec=0  ####
#### loc_power on time:hour=0,min=0,sec=0  ####
#### time out:0,showlog=1#####
KKK[1143]

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30008c62]
charsto init done
uio init done
hdmi init done
drv_cfg.video_cfg.disp_cfg.b_osd_hscle 1
display init done
gpe init done
pdec init done
driver init done
KKK[1145]
^.^ at fastlogo init menu key:
FP menu key[6] = 4
menu key[0] = 95
menu key[1] = 12
menu key[2] = 69
menu key[3] = 24
menu key[4] = 92
menu key[5] = 67
menu key[6] = 84
menu key[7] = 24
^.^ at fastlogo init usr code:
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 760 ms
drv_init
check_key,line 1210
check_key,line 1222: means FP
FPhkey=4,line key=448check_key,line 1252: NULL key
g_p_logo_buf=90291e58,g_logo_size=92605
KKKK[1644]
goto ota
boot_para3=bfedc070,*boot_para3=12340001
FastLogo_TaskEnd,80100000
#0
MaincodeTaskStart

 Built at Sep  7 2017--09:43:28 

 1. mem_start[80829e10]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, GUI_RESOURCE_BUFFER_ADDR is f09000 heap_start[0x80829e10]
free mem 1326576
**CDU UDQ**: 89de 47
Os version pass!
sonata av main start!!! av start address 83ffb000 init code 80010000
av main end!!!stack address 0x83ffb000 size 241664
KKKK[5152]
 main st=83ffb000 bo=83fdd000, size=122880    
KKKK[5160]
mem_cfg
util_init

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30000422]
charsto init done
uio init done
thread task for ethernet 9 
	Chip ID = [SONATA]!
	Chip ID = [SONATA]!
@#$TS2022
nim init done
hdmi init done
----usb_mass_stor_attach usb0------
[block reset usb0]
[block reset usb1]
usb_host_alg_reg_set ver:8107
chip_usb_debug_sonata_A1 reg 0xbff700d4[1f8b6]0xbff700d8[1f8b6]0xbff700c4[fbea0a9]0xbff700c8[fbea0a9]



 g_usb_bus_msgq 0 ###usb module#### usb_bus_task prio[18] size[0x1000]
g_usb_bus * g_usb_bus = 8083D030 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8083d350
mt_ehci_init 631
----usb_mass_stor_attach usb1------
g_usb_bus * g_usb_bus = 80859EB0 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8085a1d0
mt_ehci_init 631
usb init done
standby init done
[psc]
ps_base_reg[bfe90084]:0x803
[portC]
PortStatus[2]
StartSend Mesq:0 Bus:80859eb0
SendMesDown 2
display init done
gpe init done
demux init done
audio init done
pdec init done
vdec init done
sonata_vbi_fifo_init: [a0884a7c][20000]
vbi inserter init done
ufs init done
After Modify AT Reg:[0xbff70018] == 30000422

After Modify AT Reg:[0xbff70018] 2222 == 30000422



Before Modify AT Reg:[0xBFF70090] == 00000D11
After Modify AT Reg:[0xBFF70090] == 00300D11

After Modify AT Reg:[0xbff70018] == 30000422

serial_open
driver init done
spi_sonata_io_ctrl LINE:[3356] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[4014] type[14] mask[407c] len[2]
set mid[5e] protect status[4014] type[14]Success
[register_rtsp_stream][ERROR][ERROR] --do nothing !!!!!!!!!!
[register_rtsp_stream] please config ENABLE_DEMUX_RTSP = Y!!!!!! !!
init_av_buf start
aud fw cfg buf[81218800][180000][400]
video fw cfg buf[a1708000][2202000][4000] size 2200000
init_av_buf end
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 1180 ms
drv_init
**LCK UDQ**: 2a05

----------------------------------------
 Software version is 1314000
----------------------------------------

mdl init time = 70 ms
mid_init
[usb_bus_start....]
RecvMesDown2
left_event 0 
close_fast_logo
<<ps_base_reg[bfe90084]:0x803
[portC]
>>[Start--Connect]
[Enumerate 0x803] 
[hub_add_new_dev 809e6030]
[PortRstStart]
[p_dev80859df0   1]
[psc]
ps_base_reg[bfe90084]:0x8000205
PortStatus[0]
[Rst Down :8000205]
[HS]
usb_class_config
device ADD cost 162 ts 
[usb_bus_start....]

##usb_plug_in_callback!

 def  0; spdif 1 ; i2s  2.   now is 2 
Upgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Waiting for client up Finished.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
---------------Time Stamp[10:19:34]----------------
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
#0FastLogo_TaskStart

 Built at Sep  4 2017--18:30:35 

 1. mem_start[8030ae00]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, EPG_BUFFER_ADDR is 3dc2000
free mem 6696448
**CDU UDQ**: 89de 47
Os version pass!
Enable irq!
mem_cfg
#######2111111111111##
#######21111144444444411##
#######33333333333##
#### standby time:hour=0,min=0,sec=0  ####
#### utc power off time:hour=0,min=0,sec=0  ####
#### loc_power off time:hour=12,min=30,sec=0  ####
#### loc_power on time:hour=0,min=0,sec=0  ####
#### time out:0,showlog=1#####
KKK[1143]

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30008c62]
charsto init done
uio init done
hdmi init done
drv_cfg.video_cfg.disp_cfg.b_osd_hscle 1
display init done
gpe init done
pdec init done
driver init done
KKK[1145]
^.^ at fastlogo init menu key:
FP menu key[6] = 4
menu key[0] = 95
menu key[1] = 12
menu key[2] = 69
menu key[3] = 24
menu key[4] = 92
menu key[5] = 67
menu key[6] = 84
menu key[7] = 24
^.^ at fastlogo init usr code:
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 750 ms
drv_init
check_key,line 1210
check_key,line 1222: means FP
FPhkey=4,line key=448check_key,line 1252: NULL key
g_p_logo_buf=90291e58,g_logo_size=92605
KKKK[1644]
goto ota
boot_para3=bfedc070,*boot_para3=12340001
FastLogo_TaskEnd,80100000
#0
MaincodeTaskStart

 Built at Sep  7 2017--09:43:28 

 1. mem_start[80829e10]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, GUI_RESOURCE_BUFFER_ADDR is f09000 heap_start[0x80829e10]
free mem 1326576
**CDU UDQ**: 89de 47
Os version pass!
sonata av main start!!! av start address 83ffb000 init code 80010000
av main end!!!stack address 0x83ffb000 size 241664
KKKK[5152]
 main st=83ffb000 bo=83fdd000, size=122880    
KKKK[5160]
mem_cfg
util_init

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30000422]
charsto init done
uio init done
thread task for ethernet 9 
	Chip ID = [SONATA]!
	Chip ID = [SONATA]!
@#$TS2022
nim init done
hdmi init done
----usb_mass_stor_attach usb0------
[block reset usb0]
[block reset usb1]
usb_host_alg_reg_set ver:8107
chip_usb_debug_sonata_A1 reg 0xbff700d4[1f8b6]0xbff700d8[1f8b6]0xbff700c4[fbea0a9]0xbff700c8[fbea0a9]



 g_usb_bus_msgq 0 ###usb module#### usb_bus_task prio[18] size[0x1000]
g_usb_bus * g_usb_bus = 8083D030 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8083d350
mt_ehci_init 631
----usb_mass_stor_attach usb1------
g_usb_bus * g_usb_bus = 80859EB0 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8085a1d0
mt_ehci_init 631
usb init done
standby init done
[psc]
ps_base_reg[bfe90084]:0x803
[portC]
PortStatus[2]
StartSend Mesq:0 Bus:80859eb0
SendMesDown 2
display init done
gpe init done
demux init done
audio init done
pdec init done
vdec init done
sonata_vbi_fifo_init: [a0884a7c][20000]
vbi inserter init done
ufs init done
After Modify AT Reg:[0xbff70018] == 30000422

After Modify AT Reg:[0xbff70018] 2222 == 30000422



Before Modify AT Reg:[0xBFF70090] == 00000D11
After Modify AT Reg:[0xBFF70090] == 00300D11

After Modify AT Reg:[0xbff70018] == 30000422

serial_open
driver init done
spi_sonata_io_ctrl LINE:[3356] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[4014] type[14] mask[407c] len[2]
set mid[5e] protect status[4014] type[14]Success
[register_rtsp_stream][ERROR][ERROR] --do nothing !!!!!!!!!!
[register_rtsp_stream] please config ENABLE_DEMUX_RTSP = Y!!!!!! !!
init_av_buf start
aud fw cfg buf[81218800][180000][400]
video fw cfg buf[a1708000][2202000][4000] size 2200000
init_av_buf end
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 1170 ms
drv_init
**LCK UDQ**: 2a05

----------------------------------------
 Software version is 1314000
----------------------------------------

mdl init time = 270 ms
mid_init
[usb_bus_start....]
RecvMesDown2
left_event 0 
close_fast_logo
<<ps_base_reg[bfe90084]:0x803
[portC]
>>[Start--Connect]
[Enumerate 0x803] 
[hub_add_new_dev 809e1af0]
[PortRstStart]
[p_dev80859df0   1]
[psc]
ps_base_reg[bfe90084]:0x8000205
PortStatus[0]
[Rst Down :8000205]
[HS]
usb_class_config
device ADD cost 161 ts 
[usb_bus_start....]

##usb_plug_in_callback!
---------------Time Stamp[10:24:34]----------------
---------------Time Stamp[10:29:34]----------------
---------------Time Stamp[10:34:34]----------------
---------------Time Stamp[10:39:34]----------------
Upgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Waiting for client up Finished.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
---------------Time Stamp[10:44:34]----------------
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
#0FastLogo_TaskStart

 Built at Sep  4 2017--18:30:35 

 1. mem_start[8030ae00]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, EPG_BUFFER_ADDR is 3dc2000
free mem 6696448
**CDU UDQ**: 89de 47
Os version pass!
Enable irq!
mem_cfg
#######2111111111111##
#######21111144444444411##
#######33333333333##
#### standby time:hour=0,min=0,sec=0  ####
#### utc power off time:hour=0,min=0,sec=0  ####
#### loc_power off time:hour=12,min=30,sec=0  ####
#### loc_power on time:hour=0,min=0,sec=0  ####
#### time out:0,showlog=1#####
KKK[1143]

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30008c62]
charsto init done
uio init done
hdmi init done
drv_cfg.video_cfg.disp_cfg.b_osd_hscle 1
display init done
gpe init done
pdec init done
driver init done
KKK[1145]
^.^ at fastlogo init menu key:
FP menu key[6] = 4
menu key[0] = 95
menu key[1] = 12
menu key[2] = 69
menu key[3] = 24
menu key[4] = 92
menu key[5] = 67
menu key[6] = 84
menu key[7] = 24
^.^ at fastlogo init usr code:
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 750 ms
drv_init
check_key,line 1210
check_key,line 1222: means FP
FPhkey=4,line key=448check_key,line 1252: NULL key
g_p_logo_buf=90291a94,g_logo_size=92605
KKKK[1644]
goto ota
boot_para3=bfedc070,*boot_para3=12340001
FastLogo_TaskEnd,80100000
#0
MaincodeTaskStart

 Built at Sep  7 2017--09:44:07 

 1. mem_start[80829e10]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, GUI_RESOURCE_BUFFER_ADDR is f09000 heap_start[0x80829e10]
free mem 1326576
**CDU UDQ**: 89de 47
Os version pass!
sonata av main start!!! av start address 83ffb000 init code 80010000
av main end!!!stack address 0x83ffb000 size 241664
KKKK[5152]
 main st=83ffb000 bo=83fdd000, size=122880    
KKKK[5160]
mem_cfg
util_init

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30000422]
charsto init done
uio init done
thread task for ethernet 9 
	Chip ID = [SONATA]!
	Chip ID = [SONATA]!
@#$TS2022
nim init done
hdmi init done
----usb_mass_stor_attach usb0------
[block reset usb0]
[block reset usb1]
usb_host_alg_reg_set ver:8107
chip_usb_debug_sonata_A1 reg 0xbff700d4[1f8b6]0xbff700d8[1f8b6]0xbff700c4[fbea0a9]0xbff700c8[fbea0a9]



 g_usb_bus_msgq 0 ###usb module#### usb_bus_task prio[18] size[0x1000]
g_usb_bus * g_usb_bus = 8083D030 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8083d350
mt_ehci_init 631
----usb_mass_stor_attach usb1------
g_usb_bus * g_usb_bus = 80859EB0 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8085a1d0
mt_ehci_init 631
usb init done
standby init done
[psc]
ps_base_reg[bfe90084]:0x803
[portC]
PortStatus[2]
StartSend Mesq:0 Bus:80859eb0
SendMesDown 2
display init done
gpe init done
demux init done
audio init done
pdec init done
vdec init done
sonata_vbi_fifo_init: [a0884a7c][20000]
vbi inserter init done
ufs init done
After Modify AT Reg:[0xbff70018] == 30000422

After Modify AT Reg:[0xbff70018] 2222 == 30000422



Before Modify AT Reg:[0xBFF70090] == 00000D11
After Modify AT Reg:[0xBFF70090] == 00300D11

After Modify AT Reg:[0xbff70018] == 30000422

serial_open
driver init done
spi_sonata_io_ctrl LINE:[3356] protect status[38] type[13] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[38] type[13] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[38] type[13] mask[407c] len[2]
set mid[5e] protect status[38] type[13]Success
[register_rtsp_stream][ERROR][ERROR] --do nothing !!!!!!!!!!
[register_rtsp_stream] please config ENABLE_DEMUX_RTSP = Y!!!!!! !!
init_av_buf start
aud fw cfg buf[81218800][180000][400]
video fw cfg buf[a1708000][2202000][4000] size 2200000
init_av_buf end
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 1170 ms
drv_init
**LCK UDQ**: 2a05

----------------------------------------
 Software version is 1314000
----------------------------------------

mdl init time = 270 ms
mid_init
[usb_bus_start....]
RecvMesDown2
left_event 0 
close_fast_logo
<<ps_base_reg[bfe90084]:0x803
[portC]
>>[Start--Connect]
[Enumerate 0x803] 
[hub_add_new_dev 809e1af0]
[PortRstStart]
[p_dev80859df0   1]
[psc]
ps_base_reg[bfe90084]:0x8000205
PortStatus[0]
[Rst Down :8000205]
[HS]
usb_class_config
device ADD cost 162 ts 
[usb_bus_start....]

##usb_plug_in_callback!
Upgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Waiting for client up Finished.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
Serial Communication Error.
Upgrade return
monitor start
OjUpgrade start
Please reboot the STB manually.
monitor stop
Sync Success.
DDR calibration Pass.
SendClient.
Sending Client is complete.
Waiting for client up Finished.
Check Client
Client Functionality is good.
CheckCondition.
SendFlashToSTB.
Success to set user limit.
Success to inform the STB.
Success to start the transfer session.
---------------Time Stamp[10:49:34]----------------
Burning flash, Waiting...
Success to start the burn process.
Burn process finished.
Reboot command check ok.
Reboot
Upgrade finished
Upgrade return
monitor start
Tīnf
d init
BBBBm128rd init over
bt
bl_main
#0FastLogo_TaskStart

 Built at Sep  4 2017--18:30:35 

 1. mem_start[8030ae00]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, EPG_BUFFER_ADDR is 3dc2000
free mem 6696448
**CDU UDQ**: 89de 47
Os version pass!
Enable irq!
mem_cfg
#######2111111111111##
#######21111144444444411##
#######33333333333##
#### standby time:hour=0,min=0,sec=0  ####
#### utc power off time:hour=0,min=0,sec=0  ####
#### loc_power off time:hour=12,min=30,sec=0  ####
#### loc_power on time:hour=0,min=0,sec=0  ####
#### time out:0,showlog=1#####
KKK[1143]

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30008c62]
charsto init done
uio init done
hdmi init done
drv_cfg.video_cfg.disp_cfg.b_osd_hscle 1
display init done
gpe init done
pdec init done
driver init done
KKK[1145]
^.^ at fastlogo init menu key:
FP menu key[6] = 4
menu key[0] = 95
menu key[1] = 12
menu key[2] = 69
menu key[3] = 24
menu key[4] = 92
menu key[5] = 67
menu key[6] = 84
menu key[7] = 24
^.^ at fastlogo init usr code:
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 750 ms
drv_init
check_key,line 1210
check_key,line 1222: means FP
FPhkey=4,line key=448check_key,line 1252: NULL key
g_p_logo_buf=90291e58,g_logo_size=92605
KKKK[1644]
goto ota
boot_para3=bfedc070,*boot_para3=12340001
FastLogo_TaskEnd,80100000
#0
MaincodeTaskStart

 Built at Sep  7 2017--09:43:28 

 1. mem_start[80829e10]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, GUI_RESOURCE_BUFFER_ADDR is f09000 heap_start[0x80829e10]
free mem 1326576
**CDU UDQ**: 89de 47
Os version pass!
sonata av main start!!! av start address 83ffb000 init code 80010000
av main end!!!stack address 0x83ffb000 size 241664
KKKK[5152]
 main st=83ffb000 bo=83fdd000, size=122880    
KKKK[5160]
mem_cfg
util_init

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30000422]
charsto init done
uio init done
thread task for ethernet 9 
	Chip ID = [SONATA]!
	Chip ID = [SONATA]!
@#$TS2022
nim init done
hdmi init done
----usb_mass_stor_attach usb0------
[block reset usb0]
[block reset usb1]
usb_host_alg_reg_set ver:8107
chip_usb_debug_sonata_A1 reg 0xbff700d4[1f8b6]0xbff700d8[1f8b6]0xbff700c4[fbea0a9]0xbff700c8[fbea0a9]



 g_usb_bus_msgq 0 ###usb module#### usb_bus_task prio[18] size[0x1000]
g_usb_bus * g_usb_bus = 8083D030 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8083d350
mt_ehci_init 631
----usb_mass_stor_attach usb1------
g_usb_bus * g_usb_bus = 80859EB0 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8085a1d0
mt_ehci_init 631
usb init done
standby init done
[psc]
ps_base_reg[bfe90084]:0x803
[portC]
PortStatus[2]
StartSend Mesq:0 Bus:80859eb0
SendMesDown 2
display init done
gpe init done
demux init done
audio init done
pdec init done
vdec init done
sonata_vbi_fifo_init: [a0884a7c][20000]
vbi inserter init done
ufs init done
After Modify AT Reg:[0xbff70018] == 30000422

After Modify AT Reg:[0xbff70018] 2222 == 30000422



Before Modify AT Reg:[0xBFF70090] == 00000D11
After Modify AT Reg:[0xBFF70090] == 00300D11

After Modify AT Reg:[0xbff70018] == 30000422

serial_open
driver init done
spi_sonata_io_ctrl LINE:[3356] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[4014] type[14] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[4014] type[14] mask[407c] len[2]
set mid[5e] protect status[4014] type[14]Success
[register_rtsp_stream][ERROR][ERROR] --do nothing !!!!!!!!!!
[register_rtsp_stream] please config ENABLE_DEMUX_RTSP = Y!!!!!! !!
init_av_buf start
aud fw cfg buf[81218800][180000][400]
video fw cfg buf[a1708000][2202000][4000] size 2200000
init_av_buf end
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 1170 ms
drv_init
**LCK UDQ**: 2a05

----------------------------------------
 Software version is 1314000
----------------------------------------

mdl init time = 270 ms
mid_init
[usb_bus_start....]
RecvMesDown2
left_event 0 
close_fast_logo
<<ps_base_reg[bfe90084]:0x803
[portC]
>>[Start--Connect]
[Enumerate 0x803] 
[hub_add_new_dev 809e1af0]
[PortRstStart]
[p_dev80859df0   1]
[psc]
ps_base_reg[bfe90084]:0x8000205
PortStatus[0]
[Rst Down :8000205]
[HS]
usb_class_config
device ADD cost 161 ts 
[usb_bus_start....]

##usb_plug_in_callback!

 def  0; spdif 1 ; i2s  2.   now is 2 

 def  0; spdif 1 ; i2s  2.   now is 2 

 def  0; spdif 1 ; i2s  2.   now is 2 
---------------Time Stamp[10:54:34]----------------

##ufs_open fail[4]:[C:\backdoor.cfg]

##ufs_open fail[4]:[C:\backdoor.cfg]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[14] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[14] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_erase_usb LINE:[191] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[164]
spi_sonata_io_ctrl LINE:[3360] protect status[0] type[0] mask[0] len[0]
flash_get_status_for_app LINE:[2426] protect status[14] type[0] mask[407c] len[2]
charsto_writeonly_usb LINE:[167] protect status[14] type[0] mask[407c] len[2]spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
spi_sonata_io_ctrl LINE:[3356] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[14] type[0] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[14] type[0] mask[407c] len[2]
load_mcu type3 size1466
Tīnf
d init
BBBBm128rd init over
bt
bl_main
#0FastLogo_TaskStart

 Built at Sep  4 2017--18:30:35 

 1. mem_start[8030ae00]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, EPG_BUFFER_ADDR is 3dc2000
free mem 6696448
**CDU UDQ**: 89de 47
Os version pass!
Enable irq!
mem_cfg
#######2111111111111##
#######21111144444444411##
#######33333333333##
#### standby time:hour=0,min=0,sec=2  ####
#### utc power off time:hour=0,min=0,sec=0  ####
#### loc_power off time:hour=8,min=0,sec=0  ####
#### loc_power on time:hour=0,min=0,sec=2  ####
#### time out:0,showlog=1#####
KKK[1143]

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30008c62]
charsto init done
uio init done
hdmi init done
drv_cfg.video_cfg.disp_cfg.b_osd_hscle 1
display init done
gpe init done
pdec init done
driver init done
KKK[1145]
^.^ at fastlogo init menu key:
FP menu key[6] = 4
menu key[0] = 95
menu key[1] = 12
menu key[2] = 69
menu key[3] = 24
menu key[4] = 92
menu key[5] = 67
menu key[6] = 84
menu key[7] = 24
^.^ at fastlogo init usr code:
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 760 ms
drv_init
check_key,line 1210
check_key,line 1222: means FP
FPhkey=4,line key=448check_key,line 1252: NULL key
g_p_logo_buf=90291a94,g_logo_size=92605
KKKK[1644]
goto ota
boot_para3=bfedc070,*boot_para3=12340001
FastLogo_TaskEnd,80100000
#0
MaincodeTaskStart

 Built at Sep  7 2017--09:44:07 

 1. mem_start[80829e10]

 2. whole memory size[4000000]
SYS_PARTITION_SIZE is 59b400, GUI_RESOURCE_BUFFER_ADDR is f09000 heap_start[0x80829e10]
free mem 1326576
**CDU UDQ**: 89de 47
Os version pass!
sonata av main start!!! av start address 83ffb000 init code 80010000
av main end!!!stack address 0x83ffb000 size 241664
KKKK[5152]
 main st=83ffb000 bo=83fdd000, size=122880    
KKKK[5160]
mem_cfg
util_init

This is Sonata
CHIP ver[6].

CHIP_128_PIN.

config pinmux as [0x30000422]
charsto init done
uio init done
thread task for ethernet 9 
	Chip ID = [SONATA]!
	Chip ID = [SONATA]!
@#$TS2022
nim init done
hdmi init done
----usb_mass_stor_attach usb0------
[block reset usb0]
[block reset usb1]
usb_host_alg_reg_set ver:8107
chip_usb_debug_sonata_A1 reg 0xbff700d4[1f8b6]0xbff700d8[1f8b6]0xbff700c4[fbea0a9]0xbff700c8[fbea0a9]



 g_usb_bus_msgq 0 ###usb module#### usb_bus_task prio[18] size[0x1000]
g_usb_bus * g_usb_bus = 8083D030 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8083d350
mt_ehci_init 631
----usb_mass_stor_attach usb1------
g_usb_bus * g_usb_bus = 80859EB0 mt_ehci_init 609
mt_ehci_init 615 hcd->priv 8085a1d0
mt_ehci_init 631
usb init done
standby init done
[psc]
ps_base_reg[bfe90084]:0x803
[portC]
PortStatus[2]
StartSend Mesq:0 Bus:80859eb0
SendMesDown 2
display init done
gpe init done
demux init done
audio init done
pdec init done
vdec init done
sonata_vbi_fifo_init: [a0884a7c][20000]
vbi inserter init done
ufs init done
After Modify AT Reg:[0xbff70018] == 30000422

After Modify AT Reg:[0xbff70018] 2222 == 30000422



Before Modify AT Reg:[0xBFF70090] == 00000D11
After Modify AT Reg:[0xBFF70090] == 00300D11

After Modify AT Reg:[0xbff70018] == 30000422

serial_open
driver init done
spi_sonata_io_ctrl LINE:[3356] protect status[38] type[13] mask[407c] len[2]
flash_set_status_for_app LINE:[2337] protect status[38] type[13] mask[407c] len[2]
flash_set_status_for_app LINE:[2405] protect status[38] type[13] mask[407c] len[2]
set mid[5e] protect status[38] type[13]Success
[register_rtsp_stream][ERROR][ERROR] --do nothing !!!!!!!!!!
[register_rtsp_stream] please config ENABLE_DEMUX_RTSP = Y!!!!!! !!
init_av_buf start
aud fw cfg buf[81218800][180000][400]
video fw cfg buf[a1708000][2202000][4000] size 2200000
init_av_buf end
UsrCode[0] = 65280
UsrCode[1] = 56610
UsrCode[2] = 48896
UsrCode[3] = 57088
UsrCode[4] = 27540
UsrCode[5] = 64515
UsrCode[6] = 32640
UsrCode[7] = 57088
driver init time = 1180 ms
drv_init
**LCK UDQ**: 2a05

----------------------------------------
 Software version is 1314000
----------------------------------------

mdl init time = 70 ms
mid_init
[usb_bus_start....]
RecvMesDown2
left_event 0 
close_fast_logo
<<ps_base_reg[bfe90084]:0x803
[portC]
>>[Start--Connect]
[Enumerate 0x803] 
[hub_add_new_dev 809e6030]
[PortRstStart]
[p_dev80859df0   1]
[psc]
ps_base_reg[bfe90084]:0x8000205
PortStatus[0]
[Rst Down :8000205]
[HS]
usb_class_config
device ADD cost 162 ts 
[usb_bus_start....]

##usb_plug_in_callback!
Serial Port Closed
monitor stop
Barcode thread exit
Upgrade thread exit
monitor exit
